Chapter 3: CPUs (A+ Study Notes)

A+

Study Notebook

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You can find my complete study notes in Google Docs format below: https://docs.google.com/document/d/1zcKLWfsns1tqzmXtVRJbcd9NqfaEcjifgIo-oJIbEgc/edit?usp=sharing

References:
M. MEYERS, 2019.  CompTIA A+ All-in-One Exam Guide. 10th ed.

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Chapter 3: CPUs

• Interaction between RAM (Random Access Memory)  and CPU

• CPU requests and processes each piece of data from RAM (in order or random)
• App starts >> Sends Address to RAM in Binary ( 1 & 0s) data format representing on and off wires > RAM doesn’t do anything with that address until the CPU also turn on the “set” or the “enable” wire. 

•  When CPU switched ON: ENABLE

• RAM automatically sends data at that address back to CPU. 
• CPU processes data. 
• Once finished. CPU sends another address to RAM. 
• Turn on “enable” wire, and gets another piece of data form RAM. 
• Continues over and over again. 
•  When CPU switches: SET
• CPU outputs address, and saves data to RAM. 
• The RAM will Overwrite the data at the address with the new data.
  
  
• External Data Bus (EDB or Data Bus) - all data-handling components are connected to it. Place where all data passes through. A highway. 
• Registers - temporary memory storage areas used during data manipulation
• The larger the register the more complicated commands can be processed in one step 
• 4 main registers: AX, BX, CX, DX
• Clock (clock wire or CLK) - a single charge of voltage needs to be applied to achieve a single clock cycle. 
• Clock speed = max clock cycles what can be achieved on the CPU and the fastest speed it can go at 

1 Hz = 1 cycle per second

1 MHz = 1 million cycles per second

1 GHz = 1 billion cycles per second 

• RAM - CPUs are limited at how much temp info they can store. As such special chips are used: random access memory.
• Address Bus - helps for system to identify what memory is assigned to which task. 

• Used to transfer data between RAM and CPU.
• Because CPU doesn’t directly connect to the memory bus, but sends requests and receives results through Memory Controller Chip (MCC) - connect CPU with RAM. Grab RAM and place it on EDB. Which allows the CPU to operate. 
• Clock Multiplier  - usually most clocks run at 100 MHz , and then these are multiplied by e.g. x32 to make machine run at 3.2 GHz speed.
• Parallel Execution
• Threads - it allows CPU to execute multiple tasks at the same time. The number of threads depends on number of cores. Each core can have 2 threads. 4 core will have 8 threads, 8 core will have 16 threads. 
• SRAM(static RAM) Cache in CPU  - keeps data of often used application in CPU memory 
• L1 cache - smallest and fastest
• L2 cache - bigger and slower
• L3 cache - biggest and slowest 
• Frontside bus (CPU, MCC, RAM)  
• Backside bus (CPU & L2) 

• Multithreading
• Multicore Processing
• Integrated Memory Controller (IMC) - instead of hacing a dedicated chip it is now right on top of  CPU. Which improves performance and speeed. 

• Socket Types:

• Intel LGA (land grid array) - hundreds of contact points that line up with socket pins
• AMD uses PGA (pin grid array) - holes in the sockets